Clock synchronization problem between 800xA an MB300
I have a clock synch issue in our MB300 "network". The Time in MB300 nodes are not the same as in 800xA system
After studying the manuals and the forums i have resolved most of the problems and finaly have a better understanding of how it works.
We have 2 separate 800xA systems and the only way they are connected is through MB300. So on system 1 there is a CI855 (node 55) that is the Clock master on MB300. Its AC800 is clock master on the control net. There is also another CI855 in System 1 but it is set to AC800m Local.
System 2 gets its time from MB300 through the RTA Board (PU410) and sets it in 800xA. So setting the time is done in system 1 on CS1 in "windows time" and synched to the Control network in the AC800's, this far it works. From there it should be synched all the way to system 2 through MB300. All of the nodes on MB300 have their CLOCK_SYNCH DB set to 0,2,0 including the RTA Boards on system 1. EXCEPT for on system 2 where the RTA Boards (nodes 51 and 52) are set to 0,2,1. It is set this way since it uses the Advant Master Time function to set MB300 time to AFW time.
So the problem I have is that the other nodes get their sync from 51 in system 2. When using the locpset CMDS:TP02.CT , lclkp command it shows last synced from 51. When connecting to CI855 (55) through online builder and running lclkp it shows: "state = mast_timeset". Cannot find what this means. Tried Ret CXAE000,10 on CI855 but no change there. I then changed the config of CI855 in CBM from MB300 Master > AC800M Local downloaded. And then changed back to MB300 Master. Then it gave me "This_Is_The_Clock_Master" after lclkp. Which was great! Even checked other nodes and they were synced from 55 last.
But, Next day I checked again and they had gone back to synching from 51...
So I guess i can’t have 51 and 52 set to 0,2,1? But then system 2 wont be able to synch 800xA?
Any ideas would be appreciated.
Voted best answer
My personal experiences of CI855 says to me "you better have NO other nodes with CLK_SEND=1 on the entire MB300 control network, no nodes excluded"
- system 1 pushes the time onto MB300 via its CI855
- system 2 retrieves time from MB300 via its PU410 (but why not the own CI855 which I would prefer)
I see no reason having 0,2,1 in node 51 and 52 - in a system with an external reference clock, there should be no manual interventions made to set time. If the GPS or Internet Clock goes offline, manually check the time quality and make adjustments as necessaey in the "closest" computer (or controller) and let the sync scheme stay as it is. If something should happen to the CI855 clock master role (which I suspect will not given the removal of other speakers), SLTARG TO CI855, RDATIME, RET CXAE000,10 and you should be good again.
The way you try to sync of one 800XA w system from the other 800xA w Ac800 & Ci855 system is the recommended way to achieve a common system time.
is not an officially released command, You cannot trust the "time last set from". it may give false info. Important is that says "synced with high precision time sync" in all slave nodes
I do not believe that always report state = mast_ in CI855 node if you execute the command over and over again?
Just because that your boards in node 51,52 have 0,2,1 does not mean that they can became clock master, they are just allowed to set time
to start the clock sync function on this MB300 and the logs in controllers ( if used), the clock master that will be assigned in case you set the time in node 51 is the node which have the right to became clock master,
( MASTER=1) and have the lowest node number of the possible master nodes., ( in case you have more nodes with Clock master =1)
It is not forbidden that all nodes have clock master =1, It just give the node a possibility to became clock master. But in your case you want the CI855 always to be master and therefore you
disable the possibilities for others to became the master by changing the master parameter from 1 to 0.
Or do you have reverse time sync activated in CS51 ? if so it overrides the CI855 as master as it will generate cyclic time sets, then you have an invalid configuration.