Sequence Generator Block 161 Infi90

Good afternoon , please could you clarify the following concerns?
Customer has sequence generator block , the arrangement is Series and Parallel to Provide 24 Steps for 16 Outputs ,
They are using the three upper sequence block they have connected the step trigger to specific logics and also they have connected the jump, jump# from sequence monitor. The others three sequence generator blocks are located below .
The last block of the upper( located at righter) Sequence generator blocks use the CS current step number and STP step taken both are connected to the jump and jump # of the sequence generator blocks located below and also step trigger logics are connected to the six blocks .

The questions :
1 - For example if we are at step 16, for upper sequence generator block we have a mask 0 and 0 step timer( it means this step does nothing in output 1-8 , the lower sequence block has a mask 28 (00011100) and step timer 10 seconds(step16), the result is put 1 at 12.13.14 outputs during 10 seconds. when it happens , does the sequence go to step 17 after reaching 10 seconds?
2- if we are at step 17 upper sequence block and this step has a mask 0 step timer 1 second and in lower sequence block step 17 has a mask 128 (10000000) it means it put 1 at output 9 it is done and after 1 second does it go to step 18? .
3-when the step timer is less than processor scan time in this case 250 msecs, it should wait for 250 msec because it can not do faster than in this case 250 msecs , Is it correct?

Thanks for your support

Best Regards

Ricardo

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ricardo.marrero.a Rank: 157

Asked 12 months ago

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Hi. I think you seem to have most of the seq running the way you have indicated for q1-2. The issue with Q3 as you have indicated is the 250mSec time. The minimum time would have to be checked with your Segment timing, By default this is usually 250mSec. Normally you would have trouble getting a timing of anything under this or even near this timing. I would check you segment timer and your overall segment run (live) and check for overruns. If this number is higher on occasions than your sequence time time then you have to re-arrange your code into it's own segment and set the segment time to below 250mSec. After this you would also need to check the overall CPU load, as changes to more segments, lower segment time and more code obviously effects cpu load.

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Ingo

Rank: 28

Answered 12 months ago

Hi Ricardo...

If I'm reading your question correctly, it sounds like you have step timers set in the lower blocks? The lower blocks should only have step output masks, and the timer values are always set in the upper block. I've attached an example.

When a step timer (always set in upper blocks) gets to 0, the sequence moves to the next step. If a step does not have a timer, it will stay at that step until the jump trigger is set to 1.

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by ricardo.marrero.a Rank: 157 on 5/18/2020 5:56:08 AM | Like (0) | Report

Hi Pmac ,thanks for your response
as I have mentioned before beside to connect the CS ,STP from upper righter sequence block to the jump , jump# lower blocks ,also they have connected all sequence generator blocks to step trigger ( external logic) ,
our concern is, for example in step 16 at the upper block they have mask 0 and step timer 0.0090001 secs , in sequence generator block located below (step 16) they have the step configured as mask 28 and step timer 10 secs also.
it has a step trigger condition configured to go from step 16 to step17 I understand that if the step trigger condition is true before step timer has expired it goes to step 17 and if the timer expires before the condition is true it goes to step 17
For segment control for this CPU they have just one configured, and S2 spec shows the timer 250 msecs ,the step timer step 16( 0.0090001 secs) in upper sequence generator is less than S2 spec configured at segment control. when it happens what is the step timer used , scan time? the question is because the step timer is less than the scan of cpu.

Thanks for your support

Regards

by ricardo.marrero.a Rank: 157 on 5/18/2020 7:08:52 AM | Like (0) | Report

the step timer would be 9 millisecond to go from step 16 to step 17 , very short time

Regards

by pmac Rank: 154 on 5/19/2020 5:05:32 AM | Like (0) | Report

Without actually seeing the configuration I'm not sure I'm interpreting your notes correctly, but as Ingo pointed out, they should not be setting a step time less that 250msec. And step times should be left at 0 in the lower blocks.

by ricardo.marrero.a Rank: 157 on 5/19/2020 7:15:06 AM | Like (0) | Report

Hi Pmac thank for your response , you are interpreting the information and notes correctly.

I am going to talk to customer about that

Thanks for your support

Regards

by Alan Rank: 15 on 5/19/2020 7:19:07 PM | Like (0) | Report

Hi Ricardo,
To avoid any confusion, the important thing for series and parallel FC161 is the block numbering. Block numbering should be done by output groups in ascending order as per pmac's screenshot. I.E.

First (lowest block numbers)
OP 1-8, Step 1-8, then
OP 1-8, Step 9-16, then
OP 1-8, Step 17-24, and so on until all OP 1-8 sequence generators are blocked.

Then (higher block numbers)
OP 9-16, Step 1-8, then
OP 9-16, Step 9-16, then
OP 9-16, Step 17-24, and so on until all OP 9-16 sequence generators are blocked.

And repeat for OP 17-24 etc.

This ensures that all sequence generators are processed in the correct order and output the correct masks at the same time. Some non-sequential block ordering methods do work after a fashion but the sequence generators outputs are not synchronized and can result in unexpected operations. This is especially true with short step times where delays caused by block numbering loop backs become significant.

If not using a sequence monitor / multi sequence monitor, any step timers must only be set in the Output 1-8 sequence generators, which should also be the lowest block numbers.

If using a sequence monitor / multi sequence monitor the function code reference manual recommends that all sequence generator step timers should be set to 0 and only the sequence monitor used to used to control step transition. You mention you have a sequence with a sequence monitor and sequence generator timed steps. I guess the important thing is to make sure that the sequence monitor and sequence generators are always synchronized.

Regarding the step time of 9ms. If the segment cycle time is greater than 9mS, the step time will be equal to 1 cycle or in your case 250ms.

Cheers,
Alan

by ricardo.marrero.a Rank: 157 on 5/20/2020 8:49:37 AM | Like (0) | Report

Hi Alan Thanks for your response ,
they are using the three upper blocks 1732 , 1754 1787 block numbers to output 1-8
And the others three blocks 1743 1765 1776 output 9 -16
they have sequence monitor the trigger is connected to 0 and CS is connected to external logic , step type is 0 (S2=0 and S3=1) , but Step trigger is 0 ( S3=0) ,I mean the step type is not fullfilled . S7 spec (SN) is connected to CS of 1787 block number and S4 ( SH) is connected to STP of 1787 block number.
The blocks 1732 , 1754 , 1787 their Jump and Jump number is connected to sequence monitor to jump and jump number respectively .
Also the guys have configured step timers in some steps of ( 1732.1754,1787 blocks) and also in ( 1743,1765,1776) , not following the proper rules because it should have been done at 1732,17541787 blocks only.
Analizyng it , it looks like the sequence monitor when it receives 1 at CS meaning quality problem it goes to fault step 19 and from 1787 block the mask is 4 and for block 1776 block the mask is 63 , it would reset the sequence.
Also in some steps which they have configured step timer at short time some of them has configured trigger and one of the condition status of blower or pump after , with this short time it is not posible to wait to verify the status of the equipment related to output.

Thanks for your support

Regards

Ricardo

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pmac Rank: 154

Answered 12 months ago

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Sequence Generator Block 161 Infi90

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