Unable to verify configuration
Dear sir,
This is the fist time that I'm asking expert on this forum directly so please forgive me if this is not a proper way to do that. In our power plant we are using ABB DCS Symphony Plus 2.03 and Harmony controllers. Version of S+ engineering is 1.2. After we upload configuration from one controller we are unable to do verification of configuration that is on controller and CL documents. Controller itself doesn't show any faults during normal operation and compile passes without any errors. On other controllers everything works normal. Is there any logic error which hasn't been seen during compile which causes verify action to crash?
If you need any additional information, please feel free to contact me.
This is the fist time that I'm asking expert on this forum directly so please forgive me if this is not a proper way to do that. In our power plant we are using ABB DCS Symphony Plus 2.03 and Harmony controllers. Version of S+ engineering is 1.2. After we upload configuration from one controller we are unable to do verification of configuration that is on controller and CL documents. Controller itself doesn't show any faults during normal operation and compile passes without any errors. On other controllers everything works normal. Is there any logic error which hasn't been seen during compile which causes verify action to crash?
If you need any additional information, please feel free to contact me.
Asked 10 months ago
Voted best answer
2
Hi,
Questions aplenty...
Has the verify with this one controller just stopped recently or has this been a long term problem? If its a new problem, does it coincide with a particular change to the controller?
Is there an error message when trying to verify CLDs Vs Controller and the verify doesn't work or does the verify just stall?
Did you try verifying the configuration file Vs controller and if so did this work?
Did you try verifying the CLDs Vs the configuration file and of so did this work?
Suggestions
Try opening all of the CLDs in the controller configuration and then close the CLDs. This might identify any CLDs that whilst not corrupted might need to be re-synchronised with the cross reference databases.
Look at the compile log and investigate all warnings, especially related to “Improper Signal Connections” and resolve. “Improper Signal Connections” have caused verify problems in several recent releases of S+ Engineering. Sometimes just opening the CLD solves the problem, other times the CLD will need to opened and then saved. You may just have to move a bit of text backwards and forwards or make a trivial change to enable the save button. Refer to S+ Engineering 1.3 release notes document 2VAA002088-650 and S+ Engineering 2.1 release notes document 8VZZ000142T2100.
S+ Engineering 1.2 has a known issue with case mismatch between oref and iref text. The compile works as it is not case sensitive but the CLD verify stalls as it is case sensitive. Refer to S+ Engineering 1.2 release notes document 2VAA002088-640.
Cheers,
Alan
Questions aplenty...
Has the verify with this one controller just stopped recently or has this been a long term problem? If its a new problem, does it coincide with a particular change to the controller?
Is there an error message when trying to verify CLDs Vs Controller and the verify doesn't work or does the verify just stall?
Did you try verifying the configuration file Vs controller and if so did this work?
Did you try verifying the CLDs Vs the configuration file and of so did this work?
Suggestions
Try opening all of the CLDs in the controller configuration and then close the CLDs. This might identify any CLDs that whilst not corrupted might need to be re-synchronised with the cross reference databases.
Look at the compile log and investigate all warnings, especially related to “Improper Signal Connections” and resolve. “Improper Signal Connections” have caused verify problems in several recent releases of S+ Engineering. Sometimes just opening the CLD solves the problem, other times the CLD will need to opened and then saved. You may just have to move a bit of text backwards and forwards or make a trivial change to enable the save button. Refer to S+ Engineering 1.3 release notes document 2VAA002088-650 and S+ Engineering 2.1 release notes document 8VZZ000142T2100.
S+ Engineering 1.2 has a known issue with case mismatch between oref and iref text. The compile works as it is not case sensitive but the CLD verify stalls as it is case sensitive. Refer to S+ Engineering 1.2 release notes document 2VAA002088-640.
Cheers,
Alan
Answered 10 months ago
Source: 2VAA002088-640; 2VAA002088-650; 8VZZ000142T2100
Answers
0
Hi, I'm sorry but my knowledge from Harmony is from the time that Proces Portal B was modern, so I can not help you.
0
Issues related to verify configuration are fixed in S+ Engineering 2.1. Refer Release notes.
Also, refer to earlier version release notes, with respect to this specific issue.
Source: S+ Engineering 2.1 Release Note
Also, refer to earlier version release notes, with respect to this specific issue.
Source: S+ Engineering 2.1 Release Note
Answered 10 months ago
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